Bin Li et al 2009 Nanotechnology 20 085304 doi:10.1088/0957-4484/20/8/085304
Bin Li1,5, Zhiquan Luo1, Li Shi2, JiPing Zhou3, Lew Rabenberg2, Paul S Ho1, Richard A Allen4 and Michael W Cresswell4
Show affiliationsWe demonstrate a top-down method for fabricating nickel mono-silicide (NiSi) nanolines (also referred to as nanowires) with smooth sidewalls and line widths down to 15 nm. Four-probe electrical measurements reveal that the room temperature electrical resistivity of the NiSi nanolines remains constant as the line widths are reduced to 23 nm. The resistivity at cryogenic temperatures is found to increase with decreasing line width. This finding can be attributed to electron scattering at the sidewalls and is used to deduce an electron mean free path of 6.3 nm for NiSi at room temperature. The results suggest that NiSi nanolines with smooth sidewalls are able to meet the requirements for implementation at the 22 nm technology node without degradation of device performance.
81.16.-c Methods of nanofabrication and processing
63.22.-m Phonons or vibrational states in low-dimensional structures and nanoscale materials
68.55.-a Thin film structure and morphology
73.63.-b Electronic transport in nanoscale materials and structures
Issue 8 (25 February 2009)
Received 4 October 2008, in final form 17 December 2008
Published 2 February 2009
Bin Li et al 2009 Nanotechnology 20 085304
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