Gwong-Liang Chen et al 2007 Nanotechnology 18 475402 doi:10.1088/0957-4484/18/47/475402
Gwong-Liang Chen, David M T Kuo, Wai-Ting Lai and Pei-Wen Li
Show affiliationsWe have fabricated a Ge quantum dot (QD) (~10 nm) single-hole transistor with self-aligned electrodes using thermal oxidation of a SiGe-on-insulator nanowire based on FinFET technology. This fabricated device exhibits clear Coulomb blockade oscillations with large peak-to-valley ratio (PVCR) of 250–750 and negative differential conductance with PVCR of ~12 at room temperature. This reveals that the gate-induced tunneling barrier lowering is effectively suppressed due to the self-aligned electrode structure. The magnitude of tunneling current spectra also reveals the coupling strengths between the energy levels of the Ge QD and electrodes.
Issue 47 (28 November 2007)
Received 13 September 2007
Published 26 October 2007
Gwong-Liang Chen et al 2007 Nanotechnology 18 475402
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