Future quantum devices may exploit arrays of dopants positioned with nanoscale precision in an intrinsic semiconductor matrix. One proposal for the fabrication of such an array is by the implantation of single low-energy dopant ions into prefabricated cells within the device, the arrival of each dopant being detected electrically. With the aid of technology computer-aided design (TCAD) modelling, we outline an electrical registration process which makes use of appropriately biased electrodes incorporated within the device to detect the space charge induced within the near-intrinsic substrate by a single-ion implant.

A series of simulations aimed at optimizing the charge detection efficiency in such detectors are described, and found to be in good agreement with experimental measurements conducted to characterize fabricated test structures via high-energy He-ion implantation. We demonstrate this fabrication strategy to offer the potential of creating scalable arrangements of dopants for extended nanoscale device applications. Our interest in this scheme is the development of the Kane solid-state quantum computer (Kane B E 1998 Nature 393 133), which exploits as qubits³¹P atoms embedded with nanoscale precision in an array, within a pure²⁸Si MOS architecture.