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Hybrid Josephson-CMOS memory: a solution for the Josephson memory problem

Theodore Van Duzer1, Yijun Feng1, Xiaofan Meng1, Stephen R Whiteley1 and Nobuyuki Yoshikawa2

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The history of the development of superconductive memory for Josephson digital systems is presented along with the several current proposals. The main focus is on a proposed combination of the highly developed CMOS memory technology with Josephson peripheral circuits to achieve memories of significant size with subnanosecond access time. Background material is presented on the cryogenic operation of CMOS. Simulations and experiments on components of memory with emphasis on the important input interface amplifier are presented.


PACS

74.50.+r Tunneling phenomena; point contacts, weak links, Josephson effects

85.25.Cp Josephson devices

84.30.Sk Pulse and digital circuits

Subjects

Superconductivity

Electronics and devices

Dates

Issue 12 (December 2002)

Received 26 June 2002

Published 14 November 2002



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