C J Wilson et al 2009 Semicond. Sci. Technol. 24 115018 doi:10.1088/0268-1242/24/11/115018
C J Wilson1,2,3, K Croes2, M Van Cauwenberghe2, Zs Tőkei2, G P Beyer2, A B Horsfall1 and A G O'Neill1
Show affiliationsThis work reports the integration of a mechanical sensor to monitor stress directly in 100 nm critical dimension Cu interconnects designed to be compatible with industrial processes. The existing release methodology developed for larger scale sensors is discussed and evaluated for Cu/Low-k damascene integration schemes relevant to high-performance integrated circuits. Etching the advanced low-k SiOCH dielectrics and SiCN/O liners requires an extension of the existing techniques based on wet HF etching or dry fluorine plasma etching of SiO2. Thus, sensor release methods are optimized for the new materials and the scaled Cu sensor geometry optimized. Finally the released structure is demonstrated in both single and dual damascene technology.
81.65.Cf Surface cleaning, etching, patterning
77.55.+f Dielectric thin films
68.60.Bs Mechanical and acoustical properties
85.85.+j Micro- and nano-electromechanical systems (MEMS/NEMS) and devices
Issue 11 (November 2009)
Received 28 April 2009, in final form 21 August 2009
Published 20 October 2009
C J Wilson et al 2009 Semicond. Sci. Technol. 24 115018
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