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Review of profile and roughening simulation in microelectronics plasma etching

REVIEW ARTICLE

Wei Guo and Herbert H Sawin

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REVIEW ARTICLE

Plasma etching of thin films is essential for microelectronics manufacturing. With current feature sizes of 35 nm in production and processes for smaller devices being developed, the sidewall roughness is within the order of magnitude of the gate length of the device, and therefore significantly impacts the devices' performance. In this paper we review the modelling of the surface profile evolution in plasma etching. Both two-dimensional (2D) and three-dimensional (3D) models have been developed using a number of representations and solution algorithms. String algorithms and the method of characteristics use a segmented string which is incrementally advanced. Level-set representations describe the profile evolution as a moving interface in response to a velocity field. Cellular representations in which the area or volume domain is divided into discrete cells have been used with flux and surface kinetics based on Monte Carlo calculations. We discuss our work in the modelling of profile evolution with surface roughening using a 3D cellular Monte Carlo simulation. The formation of perpendicular and parallel ripple formation on planar surfaces as a function of ion bombardment incidence angle and the transformation from perpendicular to parallel as etching progresses has been modelled. The smoothing and/or roughening of resist masks has been demonstrated along with the pattern transfer of roughness into the underlying layers being etched.


PACS

52.77.Bn Etching and cleaning

52.65.Pp Monte Carlo methods

79.20.Rf Atomic, molecular, and ion beam impact and interactions with surfaces

52.40.Hf Plasma-material interactions; boundary layer effects

Subjects

Condensed matter: electrical, magnetic and optical

Surfaces, interfaces and thin films

Plasma physics

Dates

Issue 19 (7 October 2009)

Received 6 April 2009, in final form 8 July 2009

Published 18 September 2009



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